Reliability and safety assurance to meet modern system demands
Functional safety is not just dependent on software and software tool chain quality. It is equally dependent on the semiconductor devices on which the software runs. Tool chain and semiconductor maturity are inextricably linked. For example, the phenomenal success of ARMTM processor cores is as much the result of extensive tool chain development – compilers, debuggers, OS ports, libraries, and standards – as it is about the elegance of the architecture itself. However, in many industries such as the automotive, aerospace, and nuclear industries, there are times when general-purpose cores may not be the optimum solution. Custom processors are sometimes needed to meet specific design requirements, which typically means a new compiler must be generated for them.
The more ubiquitous and general purpose a processor architecture is, the more effort goes into verification of the tool chains commercially available to support it. For compilers, it means that bugs are discovered and corrected more quickly, resulting in much faster compiler maturity. For custom solutions the converse is true, which makes the need for compiler validation and verification from the outset even more important. For compiler developers, it is critical to making their compilers of merchantable quality. For users, it is critical to meeting functional safety requirements such as the automotive industry ISO 26262 standard.
SuperTest is one of the world’s most comprehensive compiler test, verification, and validation suites for C and C++ compilers and libraries on the market. To bootstrap new compiler development, it includes a code generator trainer – CGtrainer – that provides a suite of almost one thousand tests, divided up in 25 levels that progressively test the compiler’s code generator. Once you are satisfied with the code generator’s basic functionality, SuperTest’s exhaustive suite of tests can be unleashed to check every aspect of compiler performance, including in-depth testing of the target processor’s data model using the SuperTest Depth Suite. Once the compiler is developed, you can then compile its associated libraries, and if they are C or C++ based, verify them using SuperGuard.
Learn how leading semiconductor companies use our solutions to ensure quality and safety
The Synopsys ARC® Processor IP portfolio includes an extensive range of ARC-V™ RISC-V based processors, along with a corresponding set of optimizing compilers.
California-based SiFive is a semiconductor IP company founded in 2015 by the inventors of the open RISC-V instruction set architecture. Its semiconductor IP ranges from high-performance application processors and vector processors to low-power embedded 64- and 32-bit microcontrollers.
Codasip is a founding member of RISC-V International (formerly the RISC-V Foundation) and in 2015 became the first company to offer a commercial RISC-V IP core.
Japanese semiconductor company ROHM Co., Ltd. was established in 1958 in Kyoto and has since come a long way. The company was named ‘ROHM’ after the letter ‘R’ in its original main product, resistors, plus ‘ohm’, the unit of resistance. In line with the company’s mission of ‘Quality is First’, the R now also stands […]
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